PBJ

PBJ is a bit of Verilog code which implements a 100MHz event generator in a cheap Lattice FPGA.  It's inspired by the Spincore Pulse Blaster series, but it is not code-compatible.  It runs slower than a Pulse Blaster, but adds more trigger inputs, and more conditional jumps and waits.

PBJ can be integrated into a dedicated instrument – see the TT027 QCL pulser under TipTone instruments – or it can be a stand-alone instrument, like the PBJ1590BB

Revisions:

PBJ1

Implemented in LCMXO2 and LCMX03D, various sizes, fastest grade.

A single 100 MHz PBJ engine with some combinatorial logic, limited connectivity.

PBJ2 (2023-08)

Implemented in LCMXO3D-9400HC-6SG72C

2 independent 100 MHz PBJ engines, each with 1024 instructions,  4 inputs, and 20 outputs (16 data, 4 aux)

6 combinatorial blocks, each with 4 inputs and 1 output

2 32-bit ripple counters with selectable clock sources and gates.

FPGA has 4 inputs and 16 outputs.

A "connectome" allows flexible connections among the blocks.

Support for breakpoints and single-stepping.

First used in PBJBread, a small experimenter board in an Arduino-like form-factor.  See subsection.  

Expected to replace PBJ1 in PBJ1590BBRP