ER007 Hekstra Pulser

Generates positive pulses to 200 V.  Uses partially populated ERHVBridge with a piece of KVBridge as a dead zone generator.

Schematics of partially populated ERHVBridge are below.  An external TTL trigger come into opto-isolator U5, bottom left of the following schematic:

It creates a positive logic signal called "HIT1" which then goes to the delay generator board:

This board creates two outputs.  "DRIVES HIGH" is a logic high when HIT1 is high, and "DRIVES LOW" is a logic high when HIT1 is low.

The board also adds a few microseconds of delay so that DRIVES HIGH and DRIVES LOW are never both high at the same time, 

which prevents "shoot-through" of the following power stage.

"DRIVES HIGH" goes to pin 5 of U12 in the following schematic.  "DRIVES LOW" goes to pin 6.  U12 is an isolated MOSFET driver which 

drives the gate of Q4.  When "DRIVES HIGH" is high, U12 drives Q4 to pull the output to the high voltage supply.

When "DRIVES LOW" is high, U12 drives "GATEA" which drives MOSFET Q1 back on sheet1, which pulls the output to ground.

The remaining schematic sheet has the voltage regulators for the logic.